|Nikhil Ajay Patil|
|Devanāgarī: निखिल अजय पाटील|
I am a Ph.D. candidate in the Department of Electrical & Computer Engineering at the University of Texas at Austin. Here, I work with Prof. Derek Chiou in the FAST research group. Before coming to UT, I got my B.Tech./M.Tech. dual degree in Electrical Engineering (Microelectronics) from IIT Bombay.
I expect to graduate in Fall 2012, and am currently looking for a job. Here is my résumé (PDF), and here is a list of my publications (HTML).
You can reach me at firstname.lastname@example.org.
Over the years, I have developed an interest in digital design & verification, design automation, high-level hardware synthesis, computer architecture, simulation methods, systematic functional and performance debugging, reconfigurable computing, compilers, operating systems and formal reasoning.
While this set of interests may seem a bit disparate for a doctoral candidate (we are supposed to specialize after all), in my mind they form a clear unifying theme: significant progress needs to be made within as well as across these fields to realize computers that can evolve, i.e. computers that can fix their own flaws. If only we can bootstrap such a self-improving computer, we won’t be very far from an Asimovian future. These are the kind of dreams that keep me going from one day to another.
For my Ph.D. thesis, I have developed a processor hardware synthesis technique that allows the designer to leave “holes” unspecified in the microarchitecture; a compiler then fills these holes with combinational logic such that the instruction set is correctly implemented. In particular, the compiler generates the microinstruction format and the microcode for each instruction.
I have been a very happy user of Bluespec SystemVerilog for the past six years.